digital

Digital is a free, open-source digital logic designer and circuit simulator designed for education. It provides a graphical interface to build and simulate circuits, with features including: - Visualization of signal states with measurement graphs. - Single gate mode to analyze oscillations. - Analysis and synthesis of combinatorial and sequential circuits. - Test case creation and execution for circuit verification. - Many examples, from basic flip-flops to a complete MIPS-like single-cycle CPU. - A finite state machine (FSM) editor that can generate state transition tables and circuits. - A library of common 74xx series integrated circuits. - Support for generic (parameterized) circuits. - High performance: the example processor can run at 120 kHz. - Scalability: handles large circuits like Conway's Game of Life with ~2400 components. - Custom Java components packaged as JAR files. - A simple TCP remote interface for external tools like an assembler IDE. - VHDL and Verilog component descriptions (requires ghdl or Icarus Verilog). - Export to VHDL/Verilog and direct support for BASYS3 and TinyFPGA BX boards. - JEDEC file export for GAL16v8, GAL22v10, and ATF150x CPLDs. - SVG export, including LaTeX/Inkscape compatible version. - No legacy code, good test coverage (~80%). Documentation is available in English, German, Spanish, Portuguese, French, Italian, and simplified Chinese. The project is actively developed and welcomes contributions via GitHub issues and pull requests.